@inproceedings{HoellerHaselbergerBalleketal.,
  author    = {H{\"o}ller, Roland and Haselberger, Dominic and Ballek, Dominik and R{\"o}ssler, Peter},
  title     = {Open-Source RISC-V Processor IP Cores for FPGAs - Overview and Evaluation},
  series = {8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro},
  booktitle = {8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro},
  pages     = {6},
  subject      = {Field-Programmable Gate Array},
  language  = {en}
}
@inproceedings{RoesslerHoellerReisneretal.,
  author    = {R{\"o}ssler, Peter and H{\"o}ller, Roland and Reisner, Christopher and Schr{\"o}n, Felix and Ewers, Ekaterina},
  title     = {A Model Railway based Demonstrator for Saftey-Critical Systems},
  series = {12th European Workshop on Microelectronics Education, Sept. 24-26, 2018, Braunschweig, Germany},
  booktitle = {12th European Workshop on Microelectronics Education, Sept. 24-26, 2018, Braunschweig, Germany},
  pages     = {6},
  subject      = {Functional Safety},
  language  = {en}
}