TY  - CHAP
A1  - Jakisch, Philipp
A1  - Krammer, Christopher
A1  - Krätz, Thomas
A1  - Stukelj, Gasper
A1  - Werdenits, Lukas
A1  - Höller, Roland
A1  - Rössler, Peter
T1  - Field Programmable Analog Circuits and Arrays – An Overview
T2  - Proceedings of the IEEE International Conference on Electrical, Computer and Energy Technologies (ICECET), Cape Town, South Africa, Dec. 9-10, 2021
KW  - Field Programmable Analog Arrays
KW  - FPAA
KW  - Mixed-Signal I/O Circuits
Y1  - 
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
A1  - Reisner, Christopher
A1  - Maischberger, Oliver
T1  - Survey and Comparison of Digital Logic Simulators
T2  - Proceedings of 27th Austrochip Conference on Microelectronics, Oct. 24, 2019, Vienna, Austria
KW  - Digital Logic Simulation
KW  - Verification
KW  - Electronic Design Automation
KW  - VLSI Design
KW  - Survey
Y1  - 2020
ER  - 
TY  - JOUR
A1  - Rössler, Peter
A1  - Höller, Roland
T1  - Programmable Logic Devices – Key Components for Today's and Tomorrow's Electronic-Based Systems
JF  - e&i (Elektrotechnik und Informationstechnik), Volume 137, Issue 1, 2020
KW  - Programmable Logic Devices
KW  - Field-Programmable Gate Arrays
KW  - PLD
KW  - FPGA
Y1  - 2020
VL  - Vol. 137, 2020
IS  - Issue 1, 2020
ER  - 
TY  - CHAP
A1  - Höller, Roland
A1  - Haselberger, Dominic
A1  - Ballek, Dominik
A1  - Rössler, Peter
T1  - Open-Source RISC-V Processor IP Cores for FPGAs – Overview and Evaluation
T2  - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro
KW  - Field-Programmable Gate Array
KW  - PSoC
KW  - CPU Core
KW  - Open-Source
KW  - RISC-V
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
A1  - Reisner, Christopher
A1  - Schrön, Felix
A1  - Ewers, Ekaterina
T1  - A Model Railway based Demonstrator for Saftey-Critical Systems
T2  - 12th European Workshop on Microelectronics Education, Sept. 24-26, 2018, Braunschweig, Germany
KW  - Functional Safety
KW  - FPGA
KW  - PSoC
KW  - Distributed System
KW  - Education
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
A1  - Zauner, Martin
T1  - A methodology for remote debug, test and maintenance based on IEEE1588
T2  - ASME 2011 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference IDETC/CIE 2001 August 29-31, Washington, DC, USA.
KW  - Embedded Systems
KW  - IEEE
KW  - Testing
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Kutschera, Christof
A1  - Veigl, Christoph
A1  - Höller, Roland
A1  - Rössler, Peter
A1  - Kerö, Nikolaus
A1  - Weiß, Christoph
A1  - Gröblinger, Andreas
A1  - Muhr, Hannes
A1  - Cadek, Gerhard
T1  - Background IEEE 1588 Clock Synchronization over IEEE 802.3/Ethernet, ISPCS 2008
T2  - International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication Ann Arbor, Michigan, September 22-26, 2008
KW  - Embedded Systems
KW  - Synchronization
KW  - IEEE
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Höller, Roland
A1  - Rössler, Peter
T1  - On-chip Hardware Support for a Radically New Approach to Coordinated Debug of Networked Embedded Systems
T2  - Proceedings of the SD4 (System, Software, SoC and Silicon Debug) Conference 2009, September 24-25, 2009, Sophia Antipolis, France
KW  - Embedded Systems
KW  - On-chip Hardware
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Horauer, Martin
A1  - Praprotnik, Oliver
A1  - Zauner, Martin
A1  - Höller, Roland
A1  - Milbredt, Paul
T1  - A Test Tool for FlexRay-based Embedded Systems
T2  - Proceedings of the 2nd IEEE International Symposium on Industrial Embedded Systems (SIES'2007), Lisbon - Portugal, 4-6 July, 2007
KW  - Embedded Systems
KW  - Testing
Y1  - 2019
SN  - 1-4244-0840-7
SP  - 349
EP  - 352
ER  - 
TY  - CHAP
A1  - Muhr, Hannes
A1  - Höller, Roland
A1  - Horauer, Martin
T1  - A Heterogenous Hardware-Software Co-Simulation Environment Using User Mode Linux and Clock Suppression
T2  - Proceedings of the 2nd IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications (MESA 2006), August 13-16, Beijing, China
KW  - Hardware
KW  - Linux
KW  - Clock Suppression
KW  - Simulation
Y1  - 2019
ER  -