TY - CHAP A1 - Hausladen, Jürgen A1 - Gerstmayer, Florian A1 - Jerabek, Thomas A1 - Horauer, Martin T1 - Integration of Static Worst-Case Execution Time & Stack Usage Analysis for Embedded Systems Software in a Cloud-Based Development Environment T2 - 13th ASMEE/IEEE International Conference on Mechatronic & Embedded Systems & Applications (MESA 2017) KW - Cloud KW - Stack Usage KW - Embedded Systems Y1 - 2018 ER - TY - CHAP A1 - Hausladen, Jürgen A1 - Gerstmayer, Florian A1 - Kramer, Michael A1 - Horauer, Martin T1 - Methods for Protection of Iintellectual Property in Embedded Software - A Survey T2 - 13th ASMEE/IEEE International Conference on Mechatronic & Embedded Systems & Applications (MESA 2017) KW - Intellectual Property KW - Protection Methods KW - Embedded Systems Y1 - 2018 ER - TY - CHAP A1 - Gerstmayer, Florian A1 - Hausladen, Jürgen A1 - Kramer, Michael A1 - Horauer, Martin T1 - A Binary Protection Framework for Embedded Systems Software T2 - 12th IEEE International Symposium on Industrial Embedded Systems (SIES 2017) KW - Protection Framework KW - Embedded Systems Y1 - 2018 ER - TY - GEN A1 - Gerstmayer, Florian A1 - Hausladen, Jürgen A1 - Kramer, Michael A1 - Horauer, Martin T1 - A Binary Protection Framework for Embedded Systems Software KW - Protection Framework KW - Embedded Systems Y1 - 2018 ER - TY - CHAP A1 - Fibich, Christian A1 - Horauer, Martin A1 - Obermaisser, Roman T1 - HLShield: A Reliability Enhancement Framework for High-Level Synthesis T2 - 12th IEEE International Symposium on Industrial Embedded Systems (SIES 2017) KW - Embedded Systems Y1 - 2018 ER - TY - CHAP A1 - Fibich, Christian A1 - Horauer, Martin A1 - Obermaisser, Roman T1 - Vulnerability Analysis of Storage Elements in HLS-Generated Designs using High-Level Profiling T2 - Proceedings of the 2nd International Conference on System Reliability and Safety (ICSRS2017), 20-22 December 2017, Milan, Italy KW - High-Level Synthesis KW - Functional Safety KW - FPGA Y1 - 2017 SP - 190 EP - 194 ER -