TY  - CHAP
A1  - Fibich, Christian
A1  - Horauer, Martin
A1  - Obermaisser, Roman
T1  - Vulnerability Analysis of Storage Elements in HLS-Generated Designs using High-Level Profiling
T2  - Proceedings of the 2nd International Conference on System Reliability and Safety (ICSRS2017), 20-22 December 2017, Milan, Italy
KW  - High-Level Synthesis
KW  - Functional Safety
KW  - FPGA
Y1  - 2017
SP  - 190
EP  - 194
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Radlbauer, Josef
A1  - Horauer, Martin
A1  - Lukasch, Franz
A1  - Wimmer, Martin
T1  - Entwicklung eines Satellitenmodems
T2  - Tagungsband zum ersten Forschungsforum der österreichischen Fachhochschulen (FFH), 11-12 April, Puch/Salzburg, Austria
KW  - Satellite Modem
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Tauner, Stefan
A1  - Widhalm, Dominik
A1  - Horauer, Martin
T1  - Synchronization Approaches for Testing Mixed-Signal SoCs under Real-Time Constraints using On-Chip Capabilities
T2  - Proceedings of the IEEE Austrian Workshop on Microelectronics, Vienna, 28 Sept. 2015
KW  - Embedded Systems
Y1  - 2018
SP  - 36
EP  - 41
ER  - 
TY  - CHAP
A1  - Widhalm, Dominik
A1  - Tauner, Stefan
A1  - Horauer, Martin
T1  - Augmenting Pre-Silicon Simulation by embedding a Scripting Language in a SystemC Environment
T2  - Proceedings of the 12th IEEE/ASME International Conference on Mechatronic and Embedded Systems and Applications (MESA) 2016
KW  - Embedded Systems
Y1  - 2018
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Horauer, Martin
A1  - Obermaisser, Roman
T1  - Characterization of Interconnect Fault Effects in SRAM-based FPGAs
T2  - Proceedings of the 26th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2023), 3-5 May 2023, Tallinn, Estonia
KW  - Soft Errors
KW  - FPGA
KW  - Interconnect Fault
Y1  - 
U6  - http://dx.doi.org/https://doi.org/10.1109/DDECS57882.2023.10139343
SP  - 65
EP  - 68
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Horauer, Martin
A1  - Obermaisser, Roman
T1  - Bitstream-Level Interconnect Fault Characterization for SRAM-based FPGAs
T2  - Proceedings of the 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE 2023), pp. 1-2, 16-18 April 2023, Antwerp, Belgium
KW  - FPGA
KW  - Fault Injection
KW  - Interconnect Fault
Y1  - 
U6  - http://dx.doi.org/10.23919/DATE56975.2023.10136911
ER  -