TY - CHAP A1 - Baumgartner, Daniel A1 - Rössler, Peter A1 - Kubinger, Wilfried T1 - Performance Benchmark of DSP and FPGA Implementations of Low-Level Vision Algorithms T2 - IEEE Conference on Computer Vision and Pattern Recognition (CVPR '07), p. 1-8, 23rd June 2007, Minneapolis, Minnesota, USA KW - Embedded Systems KW - FPGA Y1 - 2019 SN - 1-4244-1180-7 SP - 1 EP - 8 ER - TY - CHAP A1 - Baumgartner, Daniel A1 - Kubinger, Wilfried A1 - Rössler, Peter T1 - Optimization and Benchmark of Vision Algorithms on a DSP T2 - Proceedings of the 18th International DAAAM Symposium on Intelligent Manufacturing & Automation, October 24-27 2007, Zadar, Croatia KW - Embedded Systems KW - Algorithm Y1 - 2019 ER - TY - CHAP A1 - Veigl, Christoph A1 - Kutschera, Christof A1 - Rössler, Peter T1 - Ausgelagerte Uhrensynchronisation für verteilte eingebettete Systeme T2 - 3. Forschungsforum der österreichischen Fachhochschulen (FFH2009), Villach, Austria, April 15-16 2009 KW - Embedded Systems KW - Synchronization Y1 - 2019 ER - TY - CHAP A1 - Eckel, C. A1 - Bodenstorfer, E. A1 - Nachtnebel, H. A1 - Rössler, Peter A1 - Fürtler, J. A1 - Mayer, K. T1 - Hochgeschwindigkeitskamera mit intelligenter Datenvorverarbeitung T2 - Proceedings of Austrochip 2006, 11 October, Vienna, Austria KW - Camera KW - Data Processing Y1 - 2019 SP - 103 EP - 108 ER - TY - CHAP A1 - Jakisch, Philipp A1 - Krammer, Christopher A1 - Krätz, Thomas A1 - Stukelj, Gasper A1 - Werdenits, Lukas A1 - Höller, Roland A1 - Rössler, Peter T1 - Field Programmable Analog Circuits and Arrays – An Overview T2 - Proceedings of the IEEE International Conference on Electrical, Computer and Energy Technologies (ICECET), Cape Town, South Africa, Dec. 9-10, 2021 KW - Field Programmable Analog Arrays KW - FPAA KW - Mixed-Signal I/O Circuits Y1 - ER - TY - CHAP A1 - Rössler, Peter A1 - Höller, Roland A1 - Reisner, Christopher A1 - Maischberger, Oliver T1 - Survey and Comparison of Digital Logic Simulators T2 - Proceedings of 27th Austrochip Conference on Microelectronics, Oct. 24, 2019, Vienna, Austria KW - Digital Logic Simulation KW - Verification KW - Electronic Design Automation KW - VLSI Design KW - Survey Y1 - 2020 ER - TY - JOUR A1 - Rössler, Peter A1 - Höller, Roland T1 - Programmable Logic Devices – Key Components for Today's and Tomorrow's Electronic-Based Systems JF - e&i (Elektrotechnik und Informationstechnik), Volume 137, Issue 1, 2020 KW - Programmable Logic Devices KW - Field-Programmable Gate Arrays KW - PLD KW - FPGA Y1 - 2020 VL - Vol. 137, 2020 IS - Issue 1, 2020 ER - TY - CHAP A1 - Höller, Roland A1 - Haselberger, Dominic A1 - Ballek, Dominik A1 - Rössler, Peter T1 - Open-Source RISC-V Processor IP Cores for FPGAs – Overview and Evaluation T2 - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro KW - Field-Programmable Gate Array KW - PSoC KW - CPU Core KW - Open-Source KW - RISC-V Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Höller, Roland A1 - Reisner, Christopher A1 - Schrön, Felix A1 - Ewers, Ekaterina T1 - A Model Railway based Demonstrator for Saftey-Critical Systems T2 - 12th European Workshop on Microelectronics Education, Sept. 24-26, 2018, Braunschweig, Germany KW - Functional Safety KW - FPGA KW - PSoC KW - Distributed System KW - Education Y1 - 2019 ER - TY - CHAP A1 - Wenzl, Matthias A1 - Rössler, Peter A1 - Puhm, Andreas T1 - Checking Application-level Properties Using Assertion Synthesis T2 - Proceedings of the ASME/IEEE International Design Engineering Technical Conferences & Computers and Information in Engineering Conference, August 18-21, 2019, Anaheim, CA, USA KW - Assertion-based Verification KW - PSL KW - Assertion Synthesis KW - Fault Detection KW - FPGA Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Höller, Roland T1 - Innovative Plattformen für Elektronische Systeme (INES) T2 - Proceedings of the FFH (Forschungsforum der Östereichischen Fachhochschulen), April 24-25, 2019, Wiener Neustadt, Austria KW - FPGA KW - Field-Programmable Gate Array KW - PLD KW - Programmable Logic Device KW - Electronic Based Systems Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Höller, Roland A1 - Zauner, Martin T1 - A methodology for remote debug, test and maintenance based on IEEE1588 T2 - ASME 2011 International Design Engineering Technical Conferences & Computers and Information in Engineering Conference IDETC/CIE 2001 August 29-31, Washington, DC, USA. KW - Embedded Systems KW - IEEE KW - Testing Y1 - 2019 ER - TY - CHAP A1 - Puhm, Andreas A1 - Rössler, Peter T1 - Entwicklung eines flexibel in der Lehre einsetzbaren Designflows für digitale Mikrochips T2 - 8. Forschungsforum der österreichischen Fachhochschulen, 23. bis 24. April 2014, Kufstein, Österreich KW - Embedded Systems KW - Microchip KW - Teaching Y1 - 2019 SP - 266 EP - 270 ER - TY - CHAP A1 - Puhm, Andreas A1 - Rössler, Peter T1 - Considerations on Teaching Digital ASIC Design T2 - Proceedings of the 10th IEEE/ASME International Conference on Mechatronics and Embedded Systems and Applications (MESA) 2014 KW - Embedded Systems KW - Education KW - ASIC Y1 - ER - TY - CHAP A1 - Aigner, Benjamin A1 - Rössler, Peter T1 - A Low-cost Sound Generator for an Electric Quad Bike T2 - MECO2013 Conference, 16-20 June, 2013, Budva, Montenegro KW - Embedded Systems Y1 - 2019 ER - TY - CHAP A1 - Horauer, Martin A1 - Rössler, Peter T1 - FlexRay (Chapter 44) T2 - The Industrial Electronics Handbook (2nd Edition), CRC Press, 2011 KW - Industrial KW - Communication System KW - Embedded Systems Y1 - 2019 PB - CRC Press ER - TY - GEN A1 - Puhm, Andreas A1 - Rössler, Peter T1 - Considerations on Teaching Digital ASIC Design KW - Embedded Systems KW - Education KW - ASIC Y1 - ER - TY - CHAP A1 - Kutschera, Christof A1 - Veigl, Christoph A1 - Höller, Roland A1 - Rössler, Peter A1 - Kerö, Nikolaus A1 - Weiß, Christoph A1 - Gröblinger, Andreas A1 - Muhr, Hannes A1 - Cadek, Gerhard T1 - Nicht-intrusive Uhrensynchronisation nach IEEE 1588 für verteilte, eingebettete Systeme via IEEE 802.3/Ethernet T2 - Tagungsband der ME 2008 - österreichische Informationstagung Mikroelektronik, Wien, 15.-16. Oktober 2008 KW - Embedded Systems Y1 - 2019 ER - TY - CHAP A1 - Kutschera, Christof A1 - Veigl, Christoph A1 - Höller, Roland A1 - Rössler, Peter A1 - Kerö, Nikolaus A1 - Weiß, Christoph A1 - Gröblinger, Andreas A1 - Muhr, Hannes A1 - Cadek, Gerhard T1 - Background IEEE 1588 Clock Synchronization over IEEE 802.3/Ethernet, ISPCS 2008 T2 - International IEEE Symposium on Precision Clock Synchronization for Measurement, Control and Communication Ann Arbor, Michigan, September 22-26, 2008 KW - Embedded Systems KW - Synchronization KW - IEEE Y1 - 2019 ER - TY - CHAP A1 - Höller, Roland A1 - Muhr, Hannes A1 - Kerö, Nikolaus A1 - Gröblinger, Andreas A1 - Veigl, Christoph A1 - Weiß, Christoph A1 - Rössler, Peter T1 - Weltweit kleinste, voll integrierte Lösung zur Uhrensynchronisation nach IEEE 1588 auf Schicht 2 T2 - agungsband zur IEEE Austrochip 2009, Graz, Österreich, 7. Oktober 2009 KW - Embedded Systems KW - Synchronization KW - IEEE Y1 - 2019 SN - 978-3-9501635-1-3 SP - 39 EP - 44 ER - TY - CHAP A1 - Balog, Peter A1 - Horauer, Martin A1 - Rössler, Peter T1 - Remote LAB infrastructure for Distance Learning Courses at the Undergraduate Level in Embedded Systems Design T2 - Proceedings of the 2009 ASME/IEEE International Conference on Mechatronic and Embedded Systems and Applications (MESA 2009), DETC2009-87148, Aug. 30-Sept. 02, 2009, San Diego, USA KW - Embedded Systems KW - Teaching Y1 - 2019 ER - TY - CHAP A1 - Puhm, Andreas A1 - Rössler, Peter A1 - Wimmer, Marcus A1 - Swierczek, Roland A1 - Balog, Peter T1 - Development of a Flexible Gateway Platform for Automotive Networks T2 - Proceedings of the 13th IEEE International Conference on Emerging Technologies and Factory Automation, ETFA 2008, September 15-18, 2008, Hamburg, Germany KW - Embedded Systems KW - Automotive Y1 - 2019 ER - TY - CHAP A1 - Höller, Roland A1 - Rössler, Peter T1 - On-chip Hardware Support for a Radically New Approach to Coordinated Debug of Networked Embedded Systems T2 - Proceedings of the SD4 (System, Software, SoC and Silicon Debug) Conference 2009, September 24-25, 2009, Sophia Antipolis, France KW - Embedded Systems KW - On-chip Hardware Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Radlbauer, Josef A1 - Horauer, Martin A1 - Lukasch, Franz A1 - Wimmer, Marcus T1 - Development of a Data Collection Platform T2 - Proceedings of IEEE International Symposium on Industrial Electronics (ISIE 2008), CD-006343, June 30 - July 2, 2008, Cambridge KW - Data Collection Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Zauner, Martin T1 - Evaluation of an Esterel-based Hardware/Software Co-Design Flow T2 - Proceedings of the 4th IEEE Symposium of Industrial Embedded Systems (SIES 2009), July 8-10, 2009, Lausanne, Switzerland KW - Embedded Systems Y1 - 2019 SP - 42 EP - 45 ER - TY - CHAP A1 - Fürtler, J. A1 - Brodersen, J. A1 - Rössler, Peter et al. T1 - Architecture for Hardware-driven Image Inspection based on FPGAs T2 - Proceedings of the SPIE Electronic Imaging 2006 Conference, Volume 6063, 15-19 January, San Jose, USA KW - Hardware Architecture KW - Image Inspection KW - FPGA Y1 - 2019 SP - 105 EP - 113 ER - TY - JOUR A1 - Fürtler, Johannes A1 - Rössler, Peter T1 - Design Considerations for Scalable High Performance Vision Systems Embedded in Industrial Print Inspection Machines JF - EURASIP International Journal on Embedded Systems, Special Issue on "Embedded Vision Systems" KW - Embedded Systems KW - Industrial Print Y1 - 2019 VL - Volume 2007 IS - Article ID 71794 ER - TY - JOUR A1 - Wimmer, Marcus A1 - Swierczek, Rafael A1 - Puhm, Andreas A1 - Balog, Peter A1 - Rössler, Peter T1 - Ein flexibler Gateway-Knoten für Netzwerke im Automobil JF - e&i, Elektrotechnik und Informationstechnik KW - Gateway KW - Network KW - Automotive KW - Embedded Systems Y1 - 2019 VL - 125 IS - 10 SP - a19 EP - a22 ER - TY - CHAP A1 - Wenzl, Matthias A1 - Fibich, Christian A1 - Rössler, Peter A1 - Taucher, Herbert A1 - Matschnig, Martin T1 - Logic Synthesis of Assertions for Saftey-critical Applications T2 - Proceedings of the 2015 International Conference on Industrial Technology (ICIT), March 17-19, 2015 KW - Safety Y1 - ER - TY - GEN A1 - Wenzl, Matthias A1 - Fibich, Christian A1 - Rössler, Peter A1 - Taucher, Herbert A1 - Matschnig, Martin T1 - Logic Synthesis of Assertions for Saftey-critical Applications KW - Safety Y1 - ER - TY - CHAP A1 - Fibich, Christian A1 - Rössler, Peter A1 - Tauner, Stefan A1 - Matschnig, Martin A1 - Taucher, Herbert T1 - A FPGA-based Demonstrator for Safety-Critical Applications T2 - IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz KW - Embedded Systems KW - FPGA Y1 - 2019 ER - TY - CHAP A1 - Fibich, Christian A1 - Wenzl, Matthias A1 - Rössler, Peter T1 - On Automated Generation of Checker Units from Hardware Assertion Languages T2 - Proceedings of the Microelectronic Systems Symposium 2014 (MESS'14), May 8-9, Vienna, 2014 KW - Embedded Systems Y1 - 2019 ER - TY - GEN A1 - Fibich, Christian A1 - Tauner, Stefan A1 - Rössler, Peter A1 - Horauer, Martin A1 - Matschnig, Martin A1 - Taucher, Herbert T1 - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu KW - FPGA KW - HLS KW - High-Level Synthesis Y1 - ER - TY - CHAP A1 - Fibich, Christian A1 - Tauner, Stefan A1 - Rössler, Peter A1 - Horauer, Martin T1 - Evaluation of Open-Source Linear Algebra Libraries targeting ARM and RISC-V Architectures T2 - Proceedings of the 2020 15th Conference on Computer Science and Information Systems (FedCSIS), 6-9 September 2020, Sofia, Bulgaria KW - Embedded Systems KW - Basic Linear Algebra Subprograms KW - Benchmarks KW - ARM KW - RISC-V Y1 - SP - 663 EP - 672 ER - TY - CHAP A1 - Fibich, Christian A1 - Tauner, Stefan A1 - Rössler, Peter A1 - Horauer, Martin A1 - Krapfenbauer, Markus A1 - Linauer, Martin A1 - Matschnig, Martin A1 - Taucher, Herbert T1 - Evaluation of Open-Source Linear Algebra Libraries in Embedded Applications T2 - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro KW - Embedded Systems KW - Basic Linear Algebra Subprograms KW - BLAS KW - Benchmark Y1 - 2019 ER - TY - CHAP A1 - Fibich, Christian A1 - Tauner, Stefan A1 - Rössler, Peter A1 - Horauer, Martin A1 - Matschnig, Martin A1 - Taucher, Herbert T1 - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu T2 - IEEE 13th International Symposium on Industrial Embedded Systems (SIES), Graz, 2018 KW - FPGA KW - HLS KW - High-Level Synthesis Y1 - 2018 ER - TY - JOUR A1 - Fibich, Christian A1 - Tauner, Stefan A1 - Rössler, Peter A1 - Horauer, Martin A1 - Matschnig, Martin A1 - Taucher, Herbert T1 - FIJI – Fault InJection Instrumenter JF - EURASIP Journal on Embedded Systems KW - Fault injection KW - FPGA KW - Safety-critical system KW - Verification KW - Electronic design automation Y1 - 2019 VL - 2019 IS - Februar 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Radlbauer, Josef A1 - Horauer, Martin A1 - Lukasch, Franz A1 - Wimmer, Martin T1 - Entwicklung eines Satellitenmodems T2 - Tagungsband zum ersten Forschungsforum der österreichischen Fachhochschulen (FFH), 11-12 April, Puch/Salzburg, Austria KW - Satellite Modem Y1 - 2019 ER - TY - CHAP A1 - Rössler, Peter A1 - Zauner, Martin T1 - Evaluierung eines Esterel-basierenden Hardware/Software Co-Design Flows T2 - Proceedings of the Austrochip 2007 KW - Hardware KW - Co-Design Y1 - 2019 SP - 99 EP - 106 ER - TY - JOUR A1 - Fibich, Christian A1 - Rössler, Peter A1 - Tauner, Stefan A1 - Taucher, Herbert A1 - Matschnig, Martin T1 - A Netlist-level Fault-injection Tool for FPGAs JF - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015) KW - FPGA KW - Embedded Systems KW - Electronic Engineering KW - Information Technology Y1 - 2019 IS - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015) ER - TY - JOUR A1 - Fibich, Christian A1 - Schmitt, Patrick A1 - Höller, Roland A1 - Rössler, Peter T1 - Open-Source Ethernet MAC IP Cores for FPGAs: Overview and Evaluation JF - International Journal of Reconfigurable Computing KW - Ethernet KW - FPGA KW - Design Reuse KW - IP Core KW - Open Source Y1 - U6 - http://dx.doi.org/https://doi.org/10.1155/2023/9222318 VL - 2023 SP - Article ID 9222318 ER -