TY  - CHAP
A1  - Höller, Roland
A1  - Haselberger, Dominic
A1  - Ballek, Dominik
A1  - Rössler, Peter
T1  - Open-Source RISC-V Processor IP Cores for FPGAs – Overview and Evaluation
T2  - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro
KW  - Field-Programmable Gate Array
KW  - PSoC
KW  - CPU Core
KW  - Open-Source
KW  - RISC-V
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
T1  - Innovative Plattformen für Elektronische Systeme (INES)
T2  - Proceedings of the FFH (Forschungsforum der Östereichischen Fachhochschulen), April 24-25, 2019, Wiener Neustadt, Austria
KW  - FPGA
KW  - Field-Programmable Gate Array
KW  - PLD
KW  - Programmable Logic Device
KW  - Electronic Based Systems
Y1  - 2019
ER  -