TY  - CHAP
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - A FPGA-based Demonstrator for Safety-Critical Applications
T2  - IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz
KW  - Embedded Systems
KW  - FPGA
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Wenzl, Matthias
A1  - Rössler, Peter
T1  - On Automated Generation of Checker Units from Hardware Assertion Languages
T2  - Proceedings of the Microelectronic Systems Symposium 2014 (MESS'14), May 8-9, Vienna, 2014
KW  - Embedded Systems
Y1  - 2019
ER  - 
TY  - GEN
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
KW  - FPGA
KW  - HLS
KW  - High-Level Synthesis
Y1  - 
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
T1  - Evaluation of Open-Source Linear Algebra Libraries targeting ARM and RISC-V Architectures
T2  - Proceedings of the 2020 15th Conference on Computer Science and Information Systems (FedCSIS), 6-9 September 2020, Sofia, Bulgaria
KW  - Embedded Systems
KW  - Basic Linear Algebra Subprograms
KW  - Benchmarks
KW  - ARM
KW  - RISC-V
Y1  - 
SP  - 663
EP  - 672
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Krapfenbauer, Markus
A1  - Linauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Evaluation of Open-Source Linear Algebra Libraries in Embedded Applications
T2  - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro
KW  - Embedded Systems
KW  - Basic Linear Algebra Subprograms
KW  - BLAS
KW  - Benchmark
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
T2  - IEEE 13th International Symposium on Industrial Embedded Systems (SIES), Graz, 2018
KW  - FPGA
KW  - HLS
KW  - High-Level Synthesis
Y1  - 2018
ER  - 
TY  - JOUR
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - FIJI – Fault InJection Instrumenter
JF  - EURASIP Journal on Embedded Systems
KW  - Fault injection
KW  - FPGA
KW  - Safety-critical system
KW  - Verification
KW  - Electronic design automation
Y1  - 2019
VL  - 2019
IS  - Februar 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Radlbauer, Josef
A1  - Horauer, Martin
A1  - Lukasch, Franz
A1  - Wimmer, Martin
T1  - Entwicklung eines Satellitenmodems
T2  - Tagungsband zum ersten Forschungsforum der österreichischen Fachhochschulen (FFH), 11-12 April, Puch/Salzburg, Austria
KW  - Satellite Modem
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Zauner, Martin
T1  - Evaluierung eines Esterel-basierenden Hardware/Software Co-Design Flows
T2  - Proceedings of the Austrochip 2007
KW  - Hardware
KW  - Co-Design
Y1  - 2019
SP  - 99
EP  - 106
ER  - 
TY  - JOUR
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Taucher, Herbert
A1  - Matschnig, Martin
T1  - A Netlist-level Fault-injection Tool for FPGAs
JF  - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015)
KW  - FPGA
KW  - Embedded Systems
KW  - Electronic Engineering
KW  - Information Technology
Y1  - 2019
IS  - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015)
ER  -