TY  - CHAP
A1  - Reinbacher, Thomas
A1  - Horauer, Martin
A1  - Schlich, Bastian
T1  - Using 3-valued Memory Representation for State Space Reduction in Embedded Assembly Code Model Checking
T2  - roceedings of the 12th IEEE Symposium on Design and Diagnostics of Electronic Systems (DDECS 2009), April 15-17, 2009, Liberec, Czech Republic
KW  - Embedded Systems
KW  - Testing
Y1  - 2019
SP  - 114
EP  - 119
ER  -