TY  - CHAP
A1  - Wenzl, Matthias
A1  - Rössler, Peter
A1  - Puhm, Andreas
T1  - Checking Application-level Properties Using Assertion Synthesis
T2  - Proceedings of the ASME/IEEE International Design Engineering Technical Conferences & Computers and Information in Engineering Conference, August 18-21, 2019, Anaheim, CA, USA
KW  - Assertion-based Verification
KW  - PSL
KW  - Assertion Synthesis
KW  - Fault Detection
KW  - FPGA
Y1  - 2019
ER  - 
TY  - JOUR
A1  - Wenzl, Matthias
A1  - Merzdovnik, Georg
A1  - Weippl, Edgar
T1  - ISaFe - Injecting Security Features into Constrained Embedded Firmware
JF  - ERCIM News
KW  - Binary rewriting
KW  - Binary Hardening
KW  - Embedded Systems
KW  - Embedded Firmware
Y1  - 2019
VL  - 2019
IS  - 119 (2019)
SP  - 25
EP  - 26
ER  - 
TY  - JOUR
A1  - Wenzl, Matthias
A1  - Merzdovnik, Georg
A1  - Ullrich, Johann
A1  - Weippl, Edgar
T1  - From Hack to Elaborate Technique - A Survey on Binary Rewriting
JF  - ACM Computing Surveys (CSUR)
KW  - Binary rewriting
KW  - Binary Hardening
KW  - Dynamic Rewriting
KW  - Reassembly
KW  - Static Rewriting
Y1  - 2019
VL  - Volume 52
IS  - Number 3 (2019)
SP  - 49:1
EP  - 49:37
ER  -