TY  - CHAP
A1  - Wenzl, Matthias
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Taucher, Herbert
A1  - Matschnig, Martin
T1  - Logic Synthesis of Assertions for Saftey-critical Applications
T2  - Proceedings of the 2015 International Conference on Industrial Technology (ICIT), March 17-19, 2015
KW  - Safety
Y1  - 
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - A FPGA-based Demonstrator for Safety-Critical Applications
T2  - IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz
KW  - Embedded Systems
KW  - FPGA
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Krapfenbauer, Markus
A1  - Linauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Evaluation of Open-Source Linear Algebra Libraries in Embedded Applications
T2  - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro
KW  - Embedded Systems
KW  - Basic Linear Algebra Subprograms
KW  - BLAS
KW  - Benchmark
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
T2  - IEEE 13th International Symposium on Industrial Embedded Systems (SIES), Graz, 2018
KW  - FPGA
KW  - HLS
KW  - High-Level Synthesis
Y1  - 2018
ER  -