TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
A1  - Reisner, Christopher
A1  - Maischberger, Oliver
T1  - Survey and Comparison of Digital Logic Simulators
T2  - Proceedings of 27th Austrochip Conference on Microelectronics, Oct. 24, 2019, Vienna, Austria
KW  - Digital Logic Simulation
KW  - Verification
KW  - Electronic Design Automation
KW  - VLSI Design
KW  - Survey
Y1  - 2020
ER  - 
TY  - CHAP
A1  - Höller, Roland
A1  - Haselberger, Dominic
A1  - Ballek, Dominik
A1  - Rössler, Peter
T1  - Open-Source RISC-V Processor IP Cores for FPGAs – Overview and Evaluation
T2  - 8th Mediterranean Conference on Embedded Computing (MECO), co-sponsored by IEEE, June 10-14, 2019, Budva, Montenegro
KW  - Field-Programmable Gate Array
KW  - PSoC
KW  - CPU Core
KW  - Open-Source
KW  - RISC-V
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Wenzl, Matthias
A1  - Rössler, Peter
A1  - Puhm, Andreas
T1  - Checking Application-level Properties Using Assertion Synthesis
T2  - Proceedings of the ASME/IEEE International Design Engineering Technical Conferences & Computers and Information in Engineering Conference, August 18-21, 2019, Anaheim, CA, USA
KW  - Assertion-based Verification
KW  - PSL
KW  - Assertion Synthesis
KW  - Fault Detection
KW  - FPGA
Y1  - 2019
ER  - 
TY  - CHAP
A1  - Rössler, Peter
A1  - Höller, Roland
T1  - Innovative Plattformen für Elektronische Systeme (INES)
T2  - Proceedings of the FFH (Forschungsforum der Östereichischen Fachhochschulen), April 24-25, 2019, Wiener Neustadt, Austria
KW  - FPGA
KW  - Field-Programmable Gate Array
KW  - PLD
KW  - Programmable Logic Device
KW  - Electronic Based Systems
Y1  - 2019
ER  - 
TY  - JOUR
A1  - Wenzl, Matthias
A1  - Merzdovnik, Georg
A1  - Weippl, Edgar
T1  - ISaFe - Injecting Security Features into Constrained Embedded Firmware
JF  - ERCIM News
KW  - Binary rewriting
KW  - Binary Hardening
KW  - Embedded Systems
KW  - Embedded Firmware
Y1  - 2019
VL  - 2019
IS  - 119 (2019)
SP  - 25
EP  - 26
ER  - 
TY  - CHAP
A1  - Billmann, Maurice
A1  - Werner, Stefan
A1  - Höller, Roland
A1  - Praus, Friedrich
A1  - Puhm, Andreas
A1  - Kerö, Nikolaus
T1  - Open-Source Crypto IP Cores for FPGAs - Overview and Evaluation
T2  - Proceedings of 27th Austrochip Conference on Microelectronics, Oct. 24, 2019, Vienna, Austria
KW  - open-source cryptography IP cores
KW  - FPGA
KW  - advanced encryption standard
KW  - secure hash algorithm
KW  - physically unclonable function
Y1  - 2020
ER  - 
TY  - GEN
A1  - Deinhofer, Martin
A1  - Sabic, Alija
A1  - Praus, Friedrich
T1  - Unterstützungstechnologien in  Smart Homes: kostengünstig & praxisnah
KW  - Smart Homes
KW  - Ambient Assistive Technologies
Y1  - 2019
ER  - 
TY  - JOUR
A1  - Kerö, Nikolaus
A1  - Puhm, Andreas
A1  - Kernen, Thomas
A1  - Mroczkowski, Anton
T1  - Performance and Reliability Aspects of Clock Synchronization Techniques for Industrial Automation
JF  - Proceedings of the IEEE
KW  - Precision Time Protocol
KW  - PTP
KW  - IEEE 1588
KW  - Reliable
KW  - Clock Synchronization
Y1  - 2019
VL  - Vol. 107
IS  - No. 6
SP  - 1011
EP  - 1026
ER  - 
TY  - JOUR
A1  - Klaus, Benjamin
A1  - Aigner, Benjamin
A1  - Veigl, Christoph
T1  - AsTeRICS Grid – a  flexible web-based application for Alternative Communication (AAC),  environmental and computer control
JF  - Technology and Disability
KW  - AAC
KW  - Environmental Control
KW  - Human-Computer Interface
Y1  - 2019
VL  - Vol. 31
IS  - No. s1
SP  - 143
EP  - 144
ER  - 
TY  - JOUR
A1  - Wenzl, Matthias
A1  - Merzdovnik, Georg
A1  - Ullrich, Johann
A1  - Weippl, Edgar
T1  - From Hack to Elaborate Technique - A Survey on Binary Rewriting
JF  - ACM Computing Surveys (CSUR)
KW  - Binary rewriting
KW  - Binary Hardening
KW  - Dynamic Rewriting
KW  - Reassembly
KW  - Static Rewriting
Y1  - 2019
VL  - Volume 52
IS  - Number 3 (2019)
SP  - 49:1
EP  - 49:37
ER  -