TY  - CHAP
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - A FPGA-based Demonstrator for Safety-Critical Applications
T2  - IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz
KW  - Embedded Systems
KW  - FPGA
Y1  - 2019
ER  - 
TY  - GEN
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
KW  - FPGA
KW  - HLS
KW  - High-Level Synthesis
Y1  - 
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Tauner, Stefan
A1  - Rössler, Peter
A1  - Horauer, Martin
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - Preliminary Evaluation of High-level Synthesis Tools - Xilinx Vivado and PandA Bambu
T2  - IEEE 13th International Symposium on Industrial Embedded Systems (SIES), Graz, 2018
KW  - FPGA
KW  - HLS
KW  - High-Level Synthesis
Y1  - 2018
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Horauer, Martin
A1  - Obermaisser, Roman
T1  - Vulnerability Analysis of Storage Elements in HLS-Generated Designs using High-Level Profiling
T2  - Proceedings of the 2nd International Conference on System Reliability and Safety (ICSRS2017), 20-22 December 2017, Milan, Italy
KW  - High-Level Synthesis
KW  - Functional Safety
KW  - FPGA
Y1  - 2017
SP  - 190
EP  - 194
ER  -