TY  - CHAP
A1  - Baumgartner, Daniel
A1  - Rössler, Peter
A1  - Kubinger, Wilfried
T1  - Performance Benchmark of DSP and FPGA Implementations of Low-Level Vision Algorithms
T2  - IEEE Conference on Computer Vision and Pattern Recognition (CVPR '07), p. 1-8, 23rd June 2007, Minneapolis, Minnesota, USA
KW  - Embedded Systems
KW  - FPGA
Y1  - 2019
SN  - 1-4244-1180-7
SP  - 1
EP  - 8
ER  - 
TY  - CHAP
A1  - Fürtler, J.
A1  - Brodersen, J.
A1  - Rössler, Peter et al.
T1  - Architecture for Hardware-driven Image Inspection based on FPGAs
T2  - Proceedings of the SPIE Electronic Imaging 2006 Conference, Volume 6063, 15-19 January, San Jose, USA
KW  - Hardware Architecture
KW  - Image Inspection
KW  - FPGA
Y1  - 2019
SP  - 105
EP  - 113
ER  - 
TY  - CHAP
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Matschnig, Martin
A1  - Taucher, Herbert
T1  - A FPGA-based Demonstrator for Safety-Critical Applications
T2  - IEEE Austria Austrochip 2017, Oct. 12, 2017, Linz
KW  - Embedded Systems
KW  - FPGA
Y1  - 2019
ER  - 
TY  - JOUR
A1  - Fibich, Christian
A1  - Rössler, Peter
A1  - Tauner, Stefan
A1  - Taucher, Herbert
A1  - Matschnig, Martin
T1  - A Netlist-level Fault-injection Tool for FPGAs
JF  - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015)
KW  - FPGA
KW  - Embedded Systems
KW  - Electronic Engineering
KW  - Information Technology
Y1  - 2019
IS  - e & i Elektrotechnik und Informationstechnik: Volume 132, Issue 6 (2015)
ER  -